With the advancement of an information society, higher performance is expected from system LSIs which are semiconductor devices indispensable to performance enhancement of mobile terminals, personal computers, digital household appliances, and the like. Means for achieving higher performance includes miniaturization of elements. For example, a processing range of 100 nm or less in terms of gate length is used for MOS transistors.
Miniaturization of MOS transistor gate length can often result in a so-called short-channel effect which increases drain-source leakage current. The short-channel effect can be suppressed if impurity density in a substrate is increased. However, increases in the impurity density in channel layers result in increased impurity scattering and consequently in reduced mobility, which in turn reduces drive current. To solve this problem, it is useful to increase the mobility of carriers moving in the channel layers right under gates and thereby enhance current-carrying ability of the channel layers.
Conventionally, the use of piezoelectric effect which produces mechanical strains in silicon devices is well known as a method for changing electrical conductivity by changing the mobility of the carriers moving in the channel layers. This method is applied mechanically to silicon devices around the end of a wafer manufacturing process of the silicon devices. This is expected to improve device performance.
An example of the application of the method to a silicon device will be described with reference to FIG. 14.
FIG. 14 is a schematic sectional view showing a configuration of a conventional semiconductor device.
As shown in FIG. 14, a semiconductor device 10 includes a semiconductor chip 1 which contains various types of metal oxide semiconductor (MOS) transistors 2 which vary in current-carrying ability and threshold voltage. A bump 6 is formed on each of the MOS transistors 2 which vary in current-carrying ability and threshold voltage via a protective film 3 and fastened to the semiconductor chip 1.
If the MOS transistor 2 is an n-channel (n-type) MOS transistor, if the current-carrying ability of the semiconductor device is lower than a predetermined value, and if the threshold voltage is higher than a predetermined value, the bump is fastened by applying a dynamic pressure 4 from above the MOS transistor 2 to bring the current-carrying ability and threshold voltage to the predetermined values. This makes it possible to change the two characteristics, i.e., increase the current-carrying ability and lower the threshold voltage below the predetermined value. This provides desired electrical characteristics to the MOS transistor, making it possible to control the electrical characteristics of the MOS transistor, i.e., the current-carrying ability and threshold voltage of the MOS transistor. Also, since changes in the pressure 4 or tension 5 applied to the MOS transistor 2, i.e., changes in an absolute value of the pressure, cause changes to the electrical characteristics, a situation in which the predetermined electrical characteristics are not available can be dealt with by adjusting the pressure 4 or tension 5.
In so doing, it is effective to form the bump 6 above the MOS transistor 2. An advantage of forming the bump 6 is that the bump 6 serves as a sort of push button making it possible to transmit the pressure 4, tension 5, or other force directly to the MOS transistor 2. Consequently, pressure is applied to the MOS transistor 2 from an entire pad rather than from point to point, applying a load uniformly.
There is an example in which characteristics of a semiconductor chip was improved by developing an ingenious structure for a semiconductor package. Specifically, at least one uneven surface was provided among contact surfaces between the semiconductor chip and package to apply stresses on the entire semiconductor chip. Incidentally, as a means of applying stresses on the entire semiconductor chip, gas pressure or liquid pressure is used when enclosing the package with the semiconductor chip mounted.
Furthermore, there is an example in which a high-mobility semiconductor chip was implemented by installing a convex stage in a semiconductor package, mounting the semiconductor chip on the stage, and thereby applying tensile stresses on a main surface of the semiconductor chip.